As is known, broadcast TV uses a frequency spectrum of about 40 MHz to about 900 MHz, depending on the country and standard. In a usual case, the spectrum may be populated with both weak and strong channels, depending on a location of a given receiver with respect to a particular transmitter. In a typical case, a mixer of a receiver down-converts both a desired channel and an image channel. The image channel is situated on an opposite side of a digital local oscillator (LO) frequency at two times the intermediate frequency (IF) away from the desired channel. The image channel, when provided by a transmitter located near a receiver, may have a relatively high power, when compared to the power of a desired channel provided by a transmitter located at greater distance from the receiver. Even when the gain of the down-converted image channel is reduced through specific techniques (e.g., bandpass filtering around the desired channel), it can be difficult to achieve a desired attenuation of the image channel. As an image channel resides on top of the desired channel when down-converted, the image channel can significantly degrade the reception quality of a receiver.
A number of techniques have been utilized in receivers to address the image channel issue. One technique has employed an up-converting/down-converting architecture to address the image channel issue. In this case, an up-conversion mixer translates a desired channel to a relatively high first intermediate frequency (IF) value (e.g., 1.2 to 1.6 GHz) to provide a relatively large 2IF distance between the desired channel and an image channel. The translated signal has then been filtered with an off-chip filter, e.g., a surface acoustic wave (SAW) or LC filter, to remove consideration of image issues in a down-converting mixer, which may convert the translated signal to standard IF, low IF or baseband. Unfortunately, up-converting/down-converting architectures are relatively expensive to implement, due to, at least in part, the off-chip filter. Moreover, such architectures have a relatively high power dissipation, due to the large number of sections operating at high frequency (typically 1 GHz or more). Additionally, up-converting/down-converting architectures have required high-speed devices, such as advanced bipolar complementary metal-oxide semiconductor (BiCMOS) or deep-submicron (e.g., less than 0.13 micron) CMOS processes, which are relatively expensive.
Another technique that has been used to address the image channel issue has employed complex (quadrature) mixers, in conjunction with off-chip front-end tracking filters. Such architectures have relatively low IF values (e.g., 30 to 60 MHz) for standard IF and even lower IF values (e.g., a 1 to 6 MHz) for low IF receivers. The relatively low desired channel to image channel separation (e.g., 60 to 120 MHz for standard IF and 2 to 12 MHz for low IF receivers) requires the implementation of a relatively high-order variable front-end tracking filter to ensure satisfactory rejection of the image channel. High-order tracking filters may require a relatively large number of discrete inductors, varactors and fixed capacitors which has increased a required footprint of the receiver printed circuit board (PCB). Furthermore, the components (e.g., inductors, varactors and fixed capacitors) of a high-order tracking filter must generally be manually aligned to reduce the impact of device process variations and to facilitate proper tracking of a desired channel. Unfortunately, high-order tracking filters are relatively expensive and are not readily integrated on-chip.
Open-loop gain and phase calibration or correction has also been used to address image channel issues for complex mixers of receivers. However, when analog correction circuitry is implemented, the low accuracy of the analog correction circuitry tends to limit an image rejection performance of a receiver. Furthermore, an analog correction circuit typically requires calibration or re-calibration to account for process, temperature and/or supply voltage variations. Additionally, analog implementations are usually not well suited for modern highly integrated solutions that use digital signal processing and digital control while digital control of loop gain and phase calibration or correction has been employed, implementing digital control has required converting the intermediate frequency (IF) in-phase (IF(I)) and IF quadrature (IF(Q)) signals to a digital format. In the terrestrial TV case, a relatively large analog-to-digital converter (ADC) dynamic range is required. Unfortunately, ADCs with large dynamic ranges are difficult to integrate in general purpose complementary metal-oxide semiconductor (CMOS) technology.
What is needed is a technique for improving image rejection of a receiver that may be readily implemented in an integrated circuit using available CMOS processes.